Stray inductance reduction in power semiconductor device modules
The invention relates to stray inductance reduction in a power semiconductor device module. In a general aspect, a module may include a substrate having semiconductor circuitry implemented thereon and a negative power supply terminal electrically coupled with the semiconductor circuitry via the subs...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
14.07.2023
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Subjects | |
Online Access | Get full text |
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Summary: | The invention relates to stray inductance reduction in a power semiconductor device module. In a general aspect, a module may include a substrate having semiconductor circuitry implemented thereon and a negative power supply terminal electrically coupled with the semiconductor circuitry via the substrate. The negative power supply terminal includes a connection tab arranged in a first plane. The module also includes a first positive power supply terminal and a second positive power supply terminal electrically coupled with the semiconductor circuit via the substrate. The first positive power supply terminal is disposed laterally to the negative power supply terminal and includes a tab disposed in a first plane. The second positive power supply terminal and the negative power supply terminal are disposed laterally and in the first plane such that the negative power supply terminal is disposed between the first positive power supply terminal and the second positive power supply terminal.
本公开涉及功率半导体器件模块中的杂散电感降低。 |
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Bibliography: | Application Number: CN202310071611 |