Memory device and operating method of memory controller controlling same

Disclosed is an operating method of a memory device, in which the memory device includes a memory block including a plurality of cell transistors stacked in a direction perpendicular to a substrate. The plurality of cell transistors may include a ground selection transistor and an erase control tran...

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Bibliographic Details
Main Authors CHOI YOUNG-HA, SEO JUN-HO, LEE DO-KYUNG, SON YONG-WAN
Format Patent
LanguageChinese
English
Published 04.07.2023
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Summary:Disclosed is an operating method of a memory device, in which the memory device includes a memory block including a plurality of cell transistors stacked in a direction perpendicular to a substrate. The plurality of cell transistors may include a ground selection transistor and an erase control transistor. The erase control transistor may be between the substrate and the ground selection transistor. The operating method may include performing a first erase operation on the ground selection transistor; performing a first program operation on the erase control transistor after the first erase operation; performing a second program operation on the ground selection transistor after the first program operation; and, after the second program operation, performing a second erase operation on the erase control transistor. 所公开的是存储器设备的操作方法,其中,存储器设备包括存储器块,存储器块包括在垂直于衬底的方向上堆叠的多个单元晶体管。多个单元晶体管可以包括接地选择晶体管和擦除控制晶体管。擦除控制晶体管可以位于衬底和接地选择晶体管之间。操作方法可以包括:对接地选择晶体管执行第一擦除操作;在第一擦除操作之后,对擦除控制晶体管执行第一编程操作;在第一编程操作之后,对接地选择晶体管执行第二编程操作;以及,在第二编程
Bibliography:Application Number: CN202211722035