Microcontroller

• Main Authors: ZHANG YE, ZHA MENGFAN, SONG ZIQI, ZHAI SHIQI, ZHAI XIANXU, MA YUNCHAO, ZHU JIAXIN, TIAN JINAN, GAN CHUNZHAO, TAO WEN, WANG TIANCHEN, HE DIAN, LI QING, WANG WENQIANG
• Format: Patent
• Language: Chinese; English
• Published: 30.06.2023
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a microcontroller, which comprises a central processing unit; the first system bus is coupled with the central processing unit; the first peripheral device group, the second system bus and the memory group are coupled with the first system bus; the memory bank comprises a Cache memory and a Flash memory, the Cache memory comprises a first SRAM memory, and the Cache memory is coupled between the first system bus and the Flash memory, so that when the central processing unit initiates a read request and a read address corresponding to the read request is an address except a Cache corresponding address, an instruction is read from the Flash memory, or when the central processing unit initiates a read request and a read address corresponding to the read request is an address except a Cache corresponding address, the instruction is read from the Flash memory. When the read request is read and a read address corresponding to the read request is one of Cache corresponding addresses, reading a