Performance test system and method based on FPGA accelerator card

• Main Authors: YUAN BAODI, QIAN YUXIANG, ZHOU CHUNXIAO
• Format: Patent
• Language: Chinese; English
• Published: 23.06.2023
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a performance test system and method based on an FPGA accelerator card, and particularly relates to the technical field of computer accelerator cards, and the method comprises the steps: 1, building a test environment based on an OpenCL framework; step 2, the basic response time of the test environment is obtained according to the time consumed by transmitting the data packet from the host end to the equipment end; step 3, executing a read operation, obtaining the time of data sent by the host end and the time of reading the data packet, and obtaining the read performance of the FPGA accelerator card; step 4, executing a write operation, obtaining execution time of the write operation of the DMA engine, and obtaining write performance of the FPGA accelerator card; 5, testing the transmission speed access frequency from the host end to the off-chip memory and from the off-chip memory to the on-chip random access memory, and obtaining the transmission performance of the FPGA acceleration