Mask high-precision alignment chip gate graph mesa glue protection layer manufacturing device

• Main Authors: LAI GUISEN, GAO SHANCHENG, ZHANG JIE, JIAO SHI, XU SHENG, HE HAIHUAN, GUO WEIMING, XIE GUIQUAN, SHAO ZHUKE, HUANG YONGRUI, CHEN QIAN, LIANG BINGGANG, TAO MIN, WANG CHENTAO, SU JIEHE, LI ZIHAO, ZHUANG XIAOLIANG, ZHOU XIANGSHENG, FANG SU
• Format: Patent
• Language: Chinese; English
• Published: 26.05.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention provides a mask high-precision alignment chip gate graph table top glue protection layer manufacturing device which comprises a workbench, a lower mold, a lower mold core, a protruding type annular surrounding plate, an upper annular working plate, a glue injection hole, a glue overflow hole, a longitudinal working support, a transverse working support, an upper mold, an upper mold core, a protruding type annular surrounding plate, a lower annular working plate, a mask and a video head. According to the invention, the mask is used to align the gate pattern of the semiconductor chip with high precision, so that the concentricity of mesa glue manufacturing is improved; glue is injected and overflowed in the diameter direction of the mold, so that a glue solution path is smooth, and bubbles in the glue are avoided; the same die can be repeatedly used, so that the utilization rate of the die is improved, and the production efficiency is improved; and after high-temperature curing and forming, the de