Hardware logic design hierarchical structure information extraction method and system based on linked list tree

• Main Authors: ZHOU LI, DENG LIN, LIU WEI, TIE JUNBO, TANG XIAO, CHANG QING, LUO LI, ZHOU HAILIANG, TANG SHIWEN, SHI WEI, ZHANG JIANFENG, LIAO HUANQIAN, PAN GUOTENG, FENG QUANYOU, FU WENJIE, GONG RUI, LU HUIHONG, ZHAO WANG
• Format: Patent
• Language: Chinese; English
• Published: 02.05.2023
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a hardware logic design hierarchical structure information extraction method and system based on a linked list tree, and the method comprises the steps: synthesizing RTL codes of hardware design into a set of netlist files through a synthesis tool, and extracting information...