Multi-phase clock generation circuit

• Main Authors: CAI MINQING, CHEN CHEN, LEE SEUNGUL
• Format: Patent
• Language: Chinese; English
• Published: 25.04.2023
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY; PULSE TECHNIQUE

The invention discloses a multi-phase clock generation circuit, which comprises a main clock generator for generating a first-stage source clock; the first frequency divider is used for receiving a first-stage source clock and generating first-stage phase information; the second frequency divider is used for receiving the first-stage phase information and outputting second-stage phase information; each sub-clock generation module comprises a first-stage sampling clock generation unit, the first first-stage sampling clock generation unit is connected with a first frequency divider, and the second first-stage sampling clock generation unit is connected with a second frequency divider; each first-stage sampling clock generation unit receives first-stage phase information and a first-stage source clock output by the previous first-stage sampling clock generation unit and outputs phase-shifted first-stage phase information, and the first-stage sampling clock generation units generate first-stage sampling clocks an