Method for reducing chip Pipeline timestamp bus bit width and application

• Main Authors: WEI JIAN, CHEN CHEN, JIANG ZHEN, YOU SHUHUA
• Format: Patent
• Language: Chinese; English
• Published: 18.04.2023
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; MULTIPLEX COMMUNICATION; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION

The invention discloses a method for reducing the bit width of a chip Pipeline timestamp bus, and the method comprises the following steps: when a timestamp capturing module in an in direction captures an M-bit in-direction timestamp, encoding a low-bit N-bit in-direction timestamp of the M-bit in-d...