Memory bank detection device based on FPGA (Field Programmable Gate Array)

The invention relates to a memory bank detection device based on an FPGA (Field Programmable Gate Array), and provides a low-cost and high-performance analysis and production line test solution aiming at memory DDR3/DDR4 constant-rate and time sequence range test and CRC/ECC (Cyclic Redundancy Check...

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Bibliographic Details
Main Authors LI CHANGSHUI, XIA YUANYANG, ZHONG YUELIANG
Format Patent
LanguageChinese
English
Published 11.04.2023
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Summary:The invention relates to a memory bank detection device based on an FPGA (Field Programmable Gate Array), and provides a low-cost and high-performance analysis and production line test solution aiming at memory DDR3/DDR4 constant-rate and time sequence range test and CRC/ECC (Cyclic Redundancy Check/Error Correction Check) data comparison, the memory bank detection device is provided with double gigabit Ethernet interfaces which can be respectively connected with an MES (Manufacturing Execution System) server end aiming at an FPGA end and an ARM (Advanced RISC Machines) check test data, and test results are uploaded in real time; and meanwhile, the HDMI interface is also provided, so that the HDMI interface can be connected with a PC end and can be used for DDR defective product analysis, data analysis and other functions. In order to be suitable for testing different types of DDR products, the device provides two program upgrading modes of the USB2.0 and the SD card, so that adaptation of different stations
Bibliography:Application Number: CN202211679201