Multi-layer multi-functional spacer stack

The invention relates to a multi-layer multi-function spacer stack. Techniques for forming a semiconductor device having a multi-layer spacer structure are provided. In an example, a semiconductor device includes a semiconductor region extending between a source region and a drain region and a gate...

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Bibliographic Details
Main Authors BOUCHET GREGOIRE, A. C. H. WEI
Format Patent
LanguageChinese
English
Published 07.04.2023
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Summary:The invention relates to a multi-layer multi-function spacer stack. Techniques for forming a semiconductor device having a multi-layer spacer structure are provided. In an example, a semiconductor device includes a semiconductor region extending between a source region and a drain region and a gate layer extending over the semiconductor region. A spacer structure comprised of one or more dielectric layers is present along sidewalls of the gate structure and along sidewalls of the source or drain region. The spacer structure has three different portions: a first portion along a sidewall of the gate, a second portion along a sidewall of the source region or the drain region, and a third portion connected between the first two portions. The third portion of the spacer structure has a multi-layer configuration, while the first and second portions have a lesser number of material layers. 本公开涉及多层多功能间隔物堆叠。提供用于形成具有多层间隔物结构的半导体器件的技术。在示例中,半导体器件包括在源极区和漏极区之间延伸的半导体区以及在半导体区上延伸的栅极层。由一个或多个介电层构成的间隔物结构沿着栅极结构的侧壁以及沿着源极区或漏极区的侧壁存在。
Bibliography:Application Number: CN202210831084