CMOS architecture with thermally stable silicide gate work function metal

• Main Authors: LILAK AARON D, RACHMADY WILLY, PHAN ANH, KAVALIEROS JACK T, DEWEY GILBERT, MANNEBACH EHREN, ACTON ORAN, HUANG CHANG-YU
• Format: Patent
• Language: Chinese; English
• Published: 04.04.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

An integrated circuit having a transistor architecture includes a first semiconductor body and a second semiconductor body. The first semiconductor body and the second semiconductor body are arranged vertically (e.g., in a stacked configuration) or horizontally (in a forked plate configuration) relative to each other and separated from each other by an insulator material, and each semiconductor body may be configured for a planar or non-planar transistor topology. A first gate structure is on the first semiconductor body and includes a first gate electrode and a first high-k gate dielectric. A second gate structure is on the second semiconductor body and includes a second gate electrode and a second high-k gate dielectric. In an example, a first gate electrode includes a layer comprising a compound of silicon and one or more metals; the second gate structure may include or does not include a silicide work function layer. In one example, the first gate electrode is n-type, and the second gate electrode is p-ty