Integrated chip structure and manufacturing method thereof

• Main Author: CHEN GAOCHAO
• Format: Patent
• Language: Chinese; English
• Published: 31.03.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The embodiment of the invention relates to an integrated chip structure and a method for manufacturing the integrated chip structure. The method forms an intermediate first material layer on a substrate and an intermediate second material layer on the intermediate first material layer. The intermediate second material layer is patterned to form an insulating layer. The intermediate first material layer is patterned to form a first material layer having an outermost sidewall indented inwardly from an outermost sidewall of the insulating layer. An ion bombardment process is performed on the insulating layer to remove one or more atoms from the insulating layer. A redeposition process is performed to redeposit one or more atoms onto an outermost sidewall of the first material layer and form a self-filling spacer under the insulating layer. 本公开的实施例涉及集成芯片结构和制造集成芯片结构的方法。该方法在衬底上形成中间第一材料层和在中间第一材料层上形成中间第二材料层。图案化中间第二材料层以形成绝缘层。图案化中间第一材料层以形成具有从绝缘层的最外侧壁向内缩进的最外侧壁的第一材料层。对绝缘层执行离子轰击工艺以从绝缘层中移出一个或多个原子。执行再沉积工艺以将一个或多个原子再沉积到第一材料层的