Field plate arrangement for trench gate field effect transistor

• Main Authors: CHEN YAPING, LEE MENGIA, YANG HONG, GREBS THOMAS EUGENE, JIN CHENGLONG
• Format: Patent
• Language: Chinese; English
• Published: 21.03.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The embodiment of the invention relates to a field plate arrangement for a trench gate field effect transistor. A trench gate metal oxide semiconductor MOSFET device (100) includes a substrate (109) having a semiconductor surface layer (108) doped to a first conductivity type. At least one trench gate MOSFET cell (105) is located in or above the semiconductor surface layer and includes a body region (102) doped to a second conductivity type in the semiconductor surface layer, and a source region (103) doped to the first conductivity type on top of the body region. A trench extends downwardly from a top side of the semiconductor surface layer, the trench adjoining the body region and being lined with a dielectric material (105c). A field plate (105b) comprising polysilicon is located in the trench, and a gate electrode (105a) is located over the field plate. The field plate has a bottom portion (105b1), a middle portion (105b2), and a top portion (105b3), where the bottom portion is narrower than the middle po