Encryption and decryption device based on RISC-V architecture

• Main Authors: WANG JIN, ZHENG BO, YUAN GUOCAI, CHEN HAO, ZHANG LEI, PAN PENG, QI XIAOLONG, JIN WEN, YE YAOWEN, SHEN JIEPING, XIANG BO, MIN QING
• Format: Patent
• Language: Chinese; English
• Published: 10.03.2023
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION

The invention discloses an encryption and decryption device based on an RISC-V architecture, and belongs to the technical field of password security. The characteristics of high performance of the FPGA and flexible programming of the Risc-v processor are combined, complex business logic analysis and flexible programming processing are completed by the Risc-v processor, data surface acceleration processing and algorithm processing are completed by the FPGA, and the system has the characteristics of high performance, low power consumption, flexibility and the like; a control and service forwarding separated structure is adopted, service data is forwarded through an intranet preprocessing module, a service logic processing module, an algorithm processing module and an extranet processing module, and high-speed service forwarding processing capacity is provided; the control data is mainly processed through the control management module, the flexible service logic processing capability is provided, and the link tr