Storage and calculation integrated device and related method

• Main Authors: JAD, GOJANAN, SACHIBRAU, GUO ZIJIE, KUMAR SUSHIL, NAVEKAR, GAURANG, PRABHAKAR, XUE CHENGXIN, DESHPANDE, CHITAN
• Format: Patent
• Language: Chinese; English
• Published: 17.01.2023
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The present invention provides an apparatus and method for performing MAC operations using a memory array as a memory-computing integrated (CIM) device, which can achieve higher computational throughput, higher performance, and lower power consumption compared to computations using a processor located outside the memory array. In some embodiments, an array of bit cells arranged in rows and columns is used to provide an activation architecture to store charges representing weight values in a weight matrix. A read word line (RWL) may also be used to provide an input activation value to bit cells within a row of bit cells, while the read bit line (RBL) is configured to receive a product from bit cells arranged in a column. Some embodiments provide a plurality of sub-arrays or blocks of an array of bit cells. 本发明提供了一种使用存储器阵列作为存算一体(CIM)装置来执行MAC操作的装置和方法，与使用位于存储器阵列外部的处理器的计算相比，其能够实现更高的计算吞吐量、更高的性能和更低的功耗。在一些实施例中，使用被布置成行和列的位单元阵列来提供激活架构以存储表示权重矩阵中的权重值的电荷。读字线(RWL)还可用于向一行位单元内的位单元提供输入激活值，而读位线(RBL)被配置为接收来自排成一列的位单元的乘积。一些实施例提供位