Method and device for identifying sequential logic

• Main Authors: XU RUOBIN, CHEN HUAIXING
• Format: Patent
• Language: Chinese; English
• Published: 20.12.2022
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention provides a sequential logic recognition method. The sequential logic recognition method comprises the steps of obtaining a process block event corresponding to a to-be-tested design; when the process block event is not successfully matched with the template, the process block event is split into a plurality of process block sub-events, the number of selection control structure layers of the process block sub-events is smaller than the number of selection control structure layers of the process block event, and the template is an optimizable sequential logic description code; and matching the process block sub-events with a template, and determining the successfully matched process block sub-events as description codes capable of being subjected to sequential logic optimization. According to the method and the device, the process block event is split into the plurality of process block sub-events with fewer layers of selection control structures, and then the split process block sub-events are su