Semiconductor package with electromagnetic interference shielding
The embodiment of the invention relates to a semiconductor package with electromagnetic interference shielding. In one embodiment, a semiconductor package includes a multi-layer package substrate including a first layer including a first dielectric layer and a first metal layer, the first metal laye...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
01.11.2022
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Subjects | |
Online Access | Get full text |
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Summary: | The embodiment of the invention relates to a semiconductor package with electromagnetic interference shielding. In one embodiment, a semiconductor package includes a multi-layer package substrate including a first layer including a first dielectric layer and a first metal layer, the first metal layer including a first metal trace; and a second layer including a second dielectric layer. An integrated circuit (IC) die includes a bond pad, wherein a bottom side of the IC die is attached to the first metal trace. A metal guide pillar is connected to the first metal trace through the second dielectric layer. A third layer on the second layer includes: a third dielectric layer on the second layer extending to a bottom side of the semiconductor package; and a second metal layer including a second metal trace, the second metal trace including an inner second metal trace connected to the bond pad and an outer second metal trace over the metal pillar; and a filled via disposed outside of a reachable contact pad, the re |
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Bibliography: | Application Number: CN202210453659 |