Forced current access with voltage clamping in crosspoint arrays

Techniques for limiting a voltage difference between two selected conductive lines in a crosspoint array when using a forced current approach are disclosed. In one aspect, a selected word line voltage is clamped to a voltage limit while driving an access current through a region of a selected word l...

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Bibliographic Details
Main Authors FRANKLIN NICK, GROBIS MICHAEL, TRAN MINH NGOC ANH, PARKINSON WARD
Format Patent
LanguageChinese
English
Published 21.10.2022
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Summary:Techniques for limiting a voltage difference between two selected conductive lines in a crosspoint array when using a forced current approach are disclosed. In one aspect, a selected word line voltage is clamped to a voltage limit while driving an access current through a region of a selected word line and through a region of a selected bit line. The access current flows through the memory cell to allow a sufficient voltage to successfully read or write the memory cell while not placing excessive stress on the memory cell. In some aspects, the allowable maximum voltage on the selected word line depends on the location of the selected memory cell in the cross-point memory array. This allows memory cells for which a larger IR drop is present to receive sufficient voltage while not generating overstress to memory cells for which a smaller IR drop is present. 本发明公开了用于在使用强制电流方法时限制交叉点阵列中两条所选择的导电线之间的电压差的技术。在一个方面,在驱动访问电流通过所选择的字线的区域并通过所选择的位线的区域的同时,所选择的字线电压被钳位到电压极限。该访问电流流过存储器单元以允许足够的电压以成功地读取或写入该存储器单元,同时不会将过度的应力置于该存储器单元
Bibliography:Application Number: CN202210085702