Method for realizing signal acquisition on FPGA (Field Programmable Gate Array) based on PMF-FFT algorithm
The invention discloses a method for realizing signal acquisition on an FPGA based on a PMF-FFT algorithm, and the method comprises the steps: inputting a signal with frequency deviation and code element phase deviation into a partial matched filtering module, and obtaining a partial matched filteri...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
30.09.2022
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Subjects | |
Online Access | Get full text |
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Summary: | The invention discloses a method for realizing signal acquisition on an FPGA based on a PMF-FFT algorithm, and the method comprises the steps: inputting a signal with frequency deviation and code element phase deviation into a partial matched filtering module, and obtaining a partial matched filtering correlation value; storing each partial matched filtering correlation value in a memory queue according to a specified sequence, and performing N-point zero padding operation; sequentially transmitting the zero-filled data of each memory to an FFTIP (Fast Fourier Transform Intellectual Property) core to carry out FFT (Fast Fourier Transform) operation, and outputting operation data; the square of the modulus of the operation data is obtained; performing maximum and minimum comparison on the value of the square of the modulus, and obtaining a maximum peak value and a coordinate K of the maximum peak value; and comparing the maximum peak value with a preset threshold value, and if the maximum peak value exceeds th |
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Bibliography: | Application Number: CN202210606368 |