Parallel set and reset circuit for resistive random access memory (RERAM) cells

A resistive random access memory (ReRAM) array capable of parallel reset and set programming and a method for programming are presented. The ReRAM array includes a plurality of ReRAM cells arranged in an array, where the array includes: a plurality of rows and a plurality of columns, where at least...

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Bibliographic Details
Main Authors DAGAN LOIC, SEVER ISAAC
Format Patent
LanguageChinese
English
Published 09.09.2022
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Summary:A resistive random access memory (ReRAM) array capable of parallel reset and set programming and a method for programming are presented. The ReRAM array includes a plurality of ReRAM cells arranged in an array, where the array includes: a plurality of rows and a plurality of columns, where at least two ReRAM cells of the array include a word, where each ReRAM cell includes a selection device having a control port, a first port, and a second port, and a resistive element; and a plurality of controllers, wherein an output of each of the plurality of controllers causes reset programming or set programming of ReRAM cells having respective word lines that are enabled in the column of the plurality of ReRAM cells; therefore, reset programming and set programming occur in parallel. 提出了一种能够并行复位和置位编程的电阻式随机存取存储器(ReRAM)阵列以及一种用于编程的方法。该ReRAM阵列包括布置成阵列的多个ReRAM单元,其中该阵列包括:多个行和多个列,其中阵列的至少两个ReRAM单元包括字,其中每个ReRAM单元包括具有控制端口、第一端口和第二端口的选择器件,以及电阻元件;以及多个控制器,其中所述多个控制器中的每一个的输出致使该多个ReRAM单元的列中、具有被启用的相应字线的ReRAM单元的复位编程或置位编程;从而使得复位编程和置位编程并行发
Bibliography:Application Number: CN202210207824