Semiconductor packaging structure and forming method thereof

• Main Authors: LIN BAIYAO, YE SHUSHEN, XU JIAGUI, YOU MINGZHI, ZHENG XINPU
• Format: Patent
• Language: Chinese; English
• Published: 30.08.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention discloses a semiconductor packaging structure and a packaging method thereof. The semiconductor packaging structure comprises a first bottom electric connector; an interposer formed over the first bottom electrical connector, the interposer including: a first bottom via structure in contact with the first bottom electrical connector; a first trace of a first redistribution layer structure formed over the first bottom via structure; the first guide hole structure is formed on the first wire of the first redistribution layer structure; a first trace of a second redistribution layer structure formed over the first via structure; and a second via structure formed over the first trace of the second redistribution layer structure, the first bottom via structure, the first via structure, and the second via structure being separated from each other in an upper view. 一种半导体封装结构及其封装方法，包括：第一底电连接器；中介层，形成于第一底电连接器之上，中介层包括：第一底导孔结构，与第一底电连接器接触；第一重分布层结构的第一走线，形成于第一底导孔结构之上；第一导孔结构，形成于第一重分布层结构的第一走线之上；第二重分布层结构的第一走线，形成于