Filter device packaging method and structure

• Main Authors: HOU JINYAN, QIAN LIWEI, WANG CHENGQIAN, PU JIE, DAI FEIHU
• Format: Patent
• Language: Chinese; English
• Published: 09.08.2022
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS

The invention discloses a filter device packaging method and structure, and belongs to the field of integrated circuit packaging. A cavity sealing protection area of the filter chip is formed by the silicon-based groove wafer and the glass wafer electrical property adapter plate by utilizing a laser local bonding technology, and filter electrical signals penetrate through salient points from the inside of the chip to be connected with the outside through the copper columns, the metal bonding pads, the rewiring metal layer and the like, so that the packaging of a filter device is realized. According to the invention, a fan-out concept is borrowed, a silicon-based groove wafer is used as a carrier, a filter chip is embedded, a glass wafer electrical property adapter plate with better insulativity is ingeniously used as a vertical interconnection means and a protective cover, a cavity and a leading-out end are constructed, and a re-wiring fan-out method is adopted, so that the contact area and the re-wiring dens