PROM program storage area expansion EDAC verification circuit and method

• Main Authors: JIA SEN, JIA KEHUI, QU XI, QUAN YONGTAO, YANG WENQING, LIU XIUNA, LU HAIQUAN, LIU SHURONG
• Format: Patent
• Language: Chinese; English
• Published: 22.04.2022
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention provides a PROM program storage area expansion EDAC verification circuit and method, which are used for solving the problem of single-bit data error of a PROM program area of an existing spaceborne computer, reducing the risk of single event upset in a space environment and improving the reliability of a product. Comprising a processor integrated with an EDAC error correction and detection function, an SRAM data storage area and a PROM program storage verification area. Wherein the SRAM data storage area comprises a first SRAM used for storing data and a second SRAM used for storing EDAC codes in the SRAM area, and the PROM program storage verification area comprises a plurality of PROMs used for storing programs and PROMs used for storing EDAC verification codes in the program area; a data bus of the processor is connected with a PROM used for storing programs, and an EDAC bus of the processor is connected with a PROM used for storing program area EDAC check codes. 本发明提供一种PROM程序存储区扩展EDAC校验电路及方法