LDPC encoding for memory cells with arbitrary levels

The title of the invention is LDPC coding for memory cells having any level. The present disclosure generally relates to applying LDPC coding to memory cells having any level. The modulation code is applied to a first portion of the user bits. The encoded user data is stored in a first modulation bl...

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Bibliographic Details
Main Authors GALBRAITH RYAN, OBUKHOV ILYA, GOODE JOHN, RAVIDARAN NATARAJAN
Format Patent
LanguageChinese
English
Published 22.04.2022
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Summary:The title of the invention is LDPC coding for memory cells having any level. The present disclosure generally relates to applying LDPC coding to memory cells having any level. The modulation code is applied to a first portion of the user bits. The encoded user data is stored in a first modulation block. A parity bit is then generated for the first portion of the user bits. The parity is then stored in a second modulation block different from the first modulation block. A modulation code is then applied to a second portion of the user bits stored in the second modulation block. Parity bits are then generated for a second portion of the user bits and stored in a third modulation block. The parity is thus embedded in a modulation block separate from the modulation block in which the user data is stored. 本发明题为"用于具有任意级的存储器单元的LDPC编码"。本公开整体涉及将LDPC编码应用于具有任意级的存储器单元。调制码被应用于用户位的第一部分。编码的用户数据存储在第一调制块中。然后为该用户位的第一部分生成奇偶校验位。然后将该奇偶校验位存储在不同于该第一调制块的第二调制块中。然后将调制码应用于存储在该第二调制块中的用户位的第二部分。然后为该用户位的第二部分生成奇偶校验位并将其存储在第三调制块中。该奇偶校验位因此嵌入在与
Bibliography:Application Number: CN202110657353