SEMICONDUCTOR MEMORY DEVICE

Embodiments provide a semiconductor memory device capable of setting a selection gate line to a desired voltage at a high speed. According to one embodiment, a semiconductor memory device includes: a plurality of memory cells; a word line connected to the gates of the plurality of memory cells; bit...

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Bibliographic Details
Main Authors HASHIMOTO TOSHIFUMI, NAKAGAWA TOMOMI, KATO KOJI
Format Patent
LanguageChinese
English
Published 18.03.2022
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Summary:Embodiments provide a semiconductor memory device capable of setting a selection gate line to a desired voltage at a high speed. According to one embodiment, a semiconductor memory device includes: a plurality of memory cells; a word line connected to the gates of the plurality of memory cells; bit lines electrically connected to one ends of the plurality of memory cells via a plurality of select gate transistors respectively connected to one ends of the plurality of memory cells; two external selection gate lines respectively connected to the gates of the two selection gate transistors at both ends of the block; one or more internal selection gate lines connected to gates of one or more selection gate transistors other than both ends of the block; and a voltage generation circuit capable of individually controlling voltage supply to the external selection gate line and the internal selection gate line when reading out data recorded in the plurality of memory cells. 实施方式提供一种能够将选择栅极线高速地设定为所期望的电压的半导体存储装置。实施方式的半
Bibliography:Application Number: CN202110086718