Comparator and analog-to-digital converter using same

The invention discloses a comparator and an analog-to-digital converter applying the same, which are used for reducing latch offset and noise by adopting a two-stage operational amplifier structure so as to improve the precision of the comparator. In order to reduce the offset of the operational amp...

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Bibliographic Details
Main Authors SONG LIN, QU GUANGYANG, ZHANG DANNI
Format Patent
LanguageChinese
English
Published 04.03.2022
Subjects
BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
PULSE TECHNIQUE
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Summary:The invention discloses a comparator and an analog-to-digital converter applying the same, which are used for reducing latch offset and noise by adopting a two-stage operational amplifier structure so as to improve the precision of the comparator. In order to reduce the offset of the operational amplifier, a working stage of offset voltage elimination is added, and meanwhile, a short circuit stage is added in each bit of conversion of analog-to-digital conversion, so that the output common-mode voltage can be kept at a certain value, the speed of the comparator is increased, and the comparator with higher performance is obtained. 本发明公开了一种比较器及应用其的模数转换器，通过采用两级运算放大器结构，降低锁存偏移和噪声，来提高比较器的精度。为了降低运算放大器的失调，加入失调电压消除的工作阶段，同时，在模数转换的每一位转换中加入短接阶段，可以使输出共模电压保持在一定值从而提高比较器的速度以获得更高性能的比较器。
Bibliography:Application Number: CN202111319170