DYNAMIC CODE LOADING FOR MULTIPLE EXECUTIONS ON A SEQUENTIAL PROCESSOR

• Main Authors: JACOB SAMUEL, EL-SHABANI MOHAMMAD, MINKIN ILYA
• Format: Patent
• Language: Chinese; English
• Published: 01.02.2022
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

Embodiments include techniques for enabling execution of N inferences on an execution engine of a neural network device. Instruction code for a single inference is stored in a memory (312) that is accessible by a DMA engine, the instruction code forming a regular code block. A NOP code block (302) and a reset code block (304) for resetting an instruction DMA queue are stored in the memory (312). The instruction DMA queue (362a) is generated such that, when it is executed by the DMA engine, it causes the DMA engine to copy, for each of N inferences, both the regular code block and an additional code block to an instruction buffer (350). The additional code block is the NOP code block (302) for the first (N- I)-th inferences and is the reset code block (304) for the N-th inference. When the reset code block (304) is executed by the execution engine the instruction DMA queue (362a) is reset. 实施例包含用于实现在神经网络装置的执行引擎上执行N个推理的技术。用于单个推理的指令代码存储在可由DMA引擎存取的存储器(312)中，所述指令代码形成常规代码块。用于复位指令DMA队列的NOP代码块(302)和复位代码块(304)存储在所述存储器