Synchronization method for clock signals with different frequencies

• Main Authors: JIAN HEBING, YAN BO, YANG CAIFANG, HU QIULIN, LI WENLONG, ZENG YINGCHUN, DENG YIFENG, WEN XUEBIN, ZHU MIN
• Format: Patent
• Language: Chinese; English
• Published: 18.01.2022
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; MULTIPLEX COMMUNICATION

The invention discloses a synchronization method for clock signals with different frequencies. The synchronization method comprises the following steps that a first module generates an nPPS pulse signal with a period of n seconds; frequency multiplication is conducted on the nPPS pulse signal to obtain a first mPPS pulse signal with a period of m seconds; the rising edge of the first mPPS pulse signal is utilized to trigger register reset of a counter of the second module; and the second module generates a second mPPS pulse signal with the period of m seconds in a counting frequency division mode, wherein m and n are both larger than 0, and n is larger than m. The fast synchronization of the slow clock signal and the fast clock signal is realized, the time for one-time synchronization is shortened, and the method is already used for actual project production at present, and good economic benefits are obtained. 本发明公开了一种不同频率时钟信号的同步方法，包括：第一模块产生周期为n秒的nPPS脉冲信号；将所述nPPS脉冲信号进行倍频得到周期为m秒的第一mPPS脉冲信号；利用第一mPPS脉冲信号的上升沿触发第二