Page buffer and semiconductor memory device having the same

Provided herein may be a page buffer and a semiconductor memory device having the same. The page buffer may include a sensing node, of which a potential is controlled based on an amount of current flowing through a bit line during a data sensing operation and based on a potential of a page buffer co...

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Bibliographic Details
Main Author PARK KANG-WOO
Format Patent
LanguageChinese
English
Published 28.12.2021
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Summary:Provided herein may be a page buffer and a semiconductor memory device having the same. The page buffer may include a sensing node, of which a potential is controlled based on an amount of current flowing through a bit line during a data sensing operation and based on a potential of a page buffer common node during a data transmission operation, and a main latch component configured to latch data based on the potential of the sensing node, wherein the main latch component latches the data depending on a first trip voltage and the potential of the sensing node during the data transmission operation, and latches the data depending on a second trip voltage and the potential of the sensing node during the data sensing operation, the first trip voltage and the second trip voltage being different. 本文可提供一种页缓冲器以及具有该页缓冲器的半导体存储器装置。该页缓冲器可包括:感测节点,其电位在数据感测操作期间基于流过位线的电流量来控制,在数据传输操作期间基于页缓冲器公共节点的电位来控制;以及主锁存器组件,其被配置为基于感测节点的电位来锁存数据,其中,主锁存器组件在数据传输操作期间根据第一跳闸电压和感测节点的电位来锁存数据,并且在数据感测操作期间根据第二跳闸电压和感测节点的电位来锁存数据,第一跳闸电压和第二跳闸电压不同。
Bibliography:Application Number: CN202110200138