FAST DYNAMIC CAPACITANCE, FREQUENCY, AND/OR VOLTAGE THROTTLING APPARATUS AND METHOD
Disclosed are a fast dynamic capacitance, frequency, and/or voltage throttling apparatus and method. A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be prede...
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Main Authors | , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
24.12.2021
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Subjects | |
Online Access | Get full text |
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Summary: | Disclosed are a fast dynamic capacitance, frequency, and/or voltage throttling apparatus and method. A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be predetermined or programmable. The battery is used to provide power to the processor and/or SoC. Upon determining that the power level of the battery falls below the threshold, the processor by-passes the conventional process of entering low performance or power mode, and directly throttles voltage and/or operating frequency of the processor. This allows the processor to continue to operate at low battery power. The fast transition (e.g., approximately 10 [mu]m S) from an active state to a low performance or power mode, in accordance with a logic level of the voltage on the dedicated pin, reduces decoupling capacitor design requirements, and makes it possible for the processor to adapt higher package power control setti |
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Bibliography: | Application Number: CN202011342463 |