CHARGE-TRANSFER SPACERS FOR STACKED NANORIBBON 2D TRANSISTORS

• Main Authors: GOSAVI TANAY, DOROW CHELSEY, PENUMATCHA ASHISH VERMA, SHIVARAMAN SHRIRAM, MAXEY KIRBY, NAYLOR CARL, O'BRIEN KEVIN P, AVCI UYGAR E
• Format: Patent
• Language: Chinese; English
• Published: 17.12.2021
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Embodiments include two-dimensional (2D) semiconductor sheet transistors and methods of forming such devices. In an embodiment, a semiconductor device comprises a stack of 2D semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end. In an embodiment, a first spacer is over the first end of the 2D semiconductor sheets, and a second spacer is over the second end of the 2D semiconductor sheets. Embodiments further comprise a gate electrode between the first spacer and the second spacer, a source contact adjacent to the first end of the 2D semiconductor sheets, and a drain contact adjacent to the second end of the 2D semiconductor sheets. 实施例包括二维(2D)半导体片晶体管以及形成这种器件的方法。在实施例中，一种半导体器件包括2D半导体片的堆叠体，其中，所述2D半导体片中的个体2D半导体片具有第一端和与第一端相对的第二端。在实施例中，第一间隔体在所述2D半导体片的第一端之上，并且第二间隔体在所述2D半导体片的第二端之上。实施例还包括在第一间隔体与第二间隔体之间的栅电极、与所述2D半导体片的第一端相邻的源极接触部和与所述2D半导体片的第二端相邻的漏极接触部。