WIDENING MEMORY ACCESS TO AN ALIGNED ADDRESS FOR UNALIGNED MEMORY OPERATIONS

• Main Authors: SEQUEIRA DE JUSTO TEIXEIRA PEDRO MIGUEL, MIHOCKA DAREK, KISHAN ARUN UPADHYAYA
• Format: Patent
• Language: Chinese; English
• Published: 12.11.2021
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

Unaligned atomic memory operations on a processor using a load-store instruction set architecture (ISA) that requires aligned accesses are performed by widening the memory access to an aligned address by the next larger power of two (e.g., 4-byte access is widened to 8 bytes, and 8-byte access is widened to 16 bytes). Data processing operations supported by the load-store ISA including shift, rotate, and bitfield manipulation are utilized to modify only the bytes in the original unaligned address so that the atomic memory operations are aligned to the widened access address. The aligned atomic memory operations using the widened accesses avoid the faulting exceptions associated with unaligned access for most 4-byte and 8-byte accesses. Exception handling is performed in cases in which memory access spans a 16-byte boundary. 在使用要求对齐的访问的加载-存储指令集架构(ISA)的处理器上，通过使用下一更大的二的幂将存储器访问加宽至对齐的地址(例如，4字节访问被加宽至8字节，并且8字节访问被加宽至16字节)，未对齐的原子存储器操作被执行。由加载-存储ISA支持的包括移位、旋转和位域操纵的数据处理操作被利用来仅修改原始未对齐的地址中的字节，以使得原子存储器操作与加宽的访问地址对齐。使用加宽访问的对齐