Multi-channel sampling synchronization method based on timestamps

The invention discloses a multi-channel sampling synchronization method based on timestamps, which comprises the following steps of: performing multi-ADC data synchronization and then performing multi-channel sampling synchronization. During multi-ADC data synchronization, synchronization pulses are...

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Bibliographic Details
Main Authors TAN FENG, YUAN CHUNYOU, YE PENG, TIAN SHULIN, JIANG ZHEN, QIU DUYU, ZHANG QINCHUAN, HUANG WUHUANG, YANG KUOJUN
Format Patent
LanguageChinese
English
Published 22.10.2021
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Summary:The invention discloses a multi-channel sampling synchronization method based on timestamps, which comprises the following steps of: performing multi-ADC data synchronization and then performing multi-channel sampling synchronization. During multi-ADC data synchronization, synchronization pulses are sent to a clock manager in three times through an FPGA, clock synchronization, data transmission link establishment and timestamp marking are completed respectively, then the FPGA receives serial channel data streams sent by multiple ADCs through a gigabit transceiver and converts the serial channel data streams into parallel data, then sequence adjustment and dynamic delay increase are carried out on the parallel data of each channel, and finally, a final user data stream is formed. During multi-channel sampling synchronization, the ADC timing sequence is firstly adjusted, and then the delay between the channels is measured and corrected. 本发明公开了一种基于时间戳的多通道采样同步方法,先进行多ADC数据同步,再进行多通道采样同步;在多ADC数据同步时,通过FPGA分三次发送同步脉冲至时
Bibliography:Application Number: CN202110725742