METHODS AND SYSTEMS FOR CO-LOCATED METROLOGY

• Main Authors: SHCHEGROV ANDREI V, MADSEN JONATHAN M, FRIEDMAN MARK, KUZNETSOV ALEXANDER, SALCIN ESEN, WANG DAVID Y, SHAUGHNESSY DERRICK
• Format: Patent
• Language: Chinese; English
• Published: 03.09.2021
• Subjects: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES; MEASURING; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS; MEASURING LENGTH, THICKNESS OR SIMILAR LINEARDIMENSIONS; PHYSICS; TESTING

Methods and systems for performing co-located measurements of semiconductor structures with two or more measurement subsystems are presented herein. To achieve a sufficiently small measurement box size, the metrology system monitors and corrects the alignment of the measurement spot of each metrology subsystem with a metrology target to achieve maximum co-location of the measurement spots of each metrology subsystem with the metrology target. In another aspect, measurements are performed simultaneously by two or more metrology subsystems at high throughput at the same wafer location. Furthermore, the metrology system effectively decouples simultaneously acquired measurement signals associated with each measurement subsystem. This maximizes signal information associated with simultaneous measurements of the same metrology by two or more metrology subsystems. 本文中呈现用于运用两个或多于两个测量子系统执行半导体结构的共址测量的方法及系统。为了实现足够小的测量盒大小，计量系统监测且校正每一计量子系统的测量点与计量目标的对准以实现每一计量子系统的所述测量点与所述计量目标的最大共址。另一方面，通过两个或多于两个计量子系统在相同晶片位置处以高处理量同时执行测量。此外，所