Preparation method of polycrystalline silicon resistor
The invention provides a preparation method of a polycrystalline silicon resistor. The preparation method comprises the following steps of: providing a substrate, wherein a polycrystalline silicon layer is formed on the substrate; and removing part of the polycrystalline silicon layer to divide the...
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Main Author | |
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Format | Patent |
Language | Chinese English |
Published |
08.06.2021
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Subjects | |
Online Access | Get full text |
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Summary: | The invention provides a preparation method of a polycrystalline silicon resistor. The preparation method comprises the following steps of: providing a substrate, wherein a polycrystalline silicon layer is formed on the substrate; and removing part of the polycrystalline silicon layer to divide the polycrystalline silicon layer into a plurality of sub polycrystalline silicon layers; simultaneously executing at least one ion implantation process on all the sub polycrystalline silicon layers; and respectively executing at least one ion implantation process on each sub polycrystalline silicon layer, wherein the types and/or concentrations of ions adopted by the sub polycrystalline silicon layers are different. Therefore, on the basis that at least one ion implantation process is executed at the same time, the ion implantation processes with different concentrations and/or different types are executed on each sub polycrystalline silicon layer, so that the preset resistivity is obtained through the ion superpositi |
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Bibliography: | Application Number: CN202110090116 |