Multi-capacitor mismatch error calculation control circuit and method

• Main Authors: LIU HAITAO, XU HONGLIN, ZHANG LIZHEN, SHEN YIHUA
• Format: Patent
• Language: Chinese; English
• Published: 30.04.2021
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY

The invention relates to a multi-capacitor mismatch error calculation control circuit, which comprises an operational amplifier, a capacitor array and a switch array, and is characterized in that the capacitor array is connected to the positive and negative input ends of the operational amplifier, and the switch array comprises switches for controlling the capacitor array; and the capacitor array comprises capacitors C0-Cn-1, each capacitor is controlled by independent switch control signals [phi]0 to [phi]n-1, the capacitors are connected to input signals Vin and Vcm or reference voltages Vp and Vn according to different switches, the quantization amplitude Vr of the ADC is equal to Vp-Vn, the relationship between n and the current MDAC quantization digit N is n=2N-1, and n and N are positive integers. The invention also discloses a multi-capacitor mismatch error calculation method. Under the condition that only one fixed calibration voltage is used, errors of multiple capacitors can be calculated one by one