Coarse-grained reconfigurable array scheduling method based on sub-graph decoupling

• Main Authors: JIANG JIANFEI, JING NAIFENG, WANG QIN, HE GUANGHUI, MAO ZHIGANG, YIN CHEN
• Format: Patent
• Language: Chinese; English
• Published: 23.04.2021
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention provides a coarse-grained reconfigurable array scheduling method based on sub-graph decoupling, and relates to the field of computer coprocessor accelerators, wherein the coarse-grained reconfigurable array scheduling method comprises a sub-graph decoupling module, a dynamic configuration switching module and a sub-graph scheduler, the sub-graph decoupling module decoupling the data flow graph into sub-graphs and sequentially executing the sub-graphs on the basis of non-consistent control flow in the program; the dynamic configuration switching module designs a domino type configuration switching mechanism, so that the expenditure of dynamic configuration switching is reduced; and the sub-graph scheduler dynamically schedules the execution sequence of the sub-graphs by monitoring the empty and full states of sub-caches in an on-chip cache. By utilizing the algorithm provided by the invention, the utilization rate of an array computing unit (PE) can be improved, and the expenditure of sub-graph s