Resistance-variable neural network accelerator evaluation method based on FPGA simulation

• Main Authors: SHI YONGQUAN, JIANG JIANFEI, SHENG WEIGUANG, JING NAIFENG, SUN YONGSHUAI, WANG QIN, HE GUANGHUI
• Format: Patent
• Language: Chinese; English
• Published: 06.04.2021
• Subjects: CALCULATING; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a resistance-variable neural network accelerator evaluation method based on FPGA simulation, which relates to the field of storage and calculation integrated system structures and comprises compiling of a storage and calculation integrated general instruction set, establishment of an architecture model, realization of software and hardware of an accelerator and performance evaluation of a deep neural network. In order to accelerate the simulation speed, architecture universality of an existing resistive neural network accelerator is analyzed, the high parallelism of FPGA resources and a flexible simulation mode of instruction driving during operation are utilized, and the functional simulation of a mainstream resistive neural network accelerator architecture and an instruction set is supported through the time division multiplexing of limited hardware resources; and detailed performance evaluation is provided for the mainstream network. Compared with a traditional hardware simulator, t