MEMORY DEVICE
A memory device provided by the present invention includes a plurality of bit lines extending in a first direction, a plurality of lower memory cells below the bit lines and connected to the pluralityof bit lines, and a plurality of upper memory cells above the plurality of bit lines and connected t...
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Main Author | |
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Format | Patent |
Language | Chinese English |
Published |
02.04.2021
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Subjects | |
Online Access | Get full text |
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Summary: | A memory device provided by the present invention includes a plurality of bit lines extending in a first direction, a plurality of lower memory cells below the bit lines and connected to the pluralityof bit lines, and a plurality of upper memory cells above the plurality of bit lines and connected to the plurality of bit lines. The memory device comprises a plurality of cell array regions and a plurality of bit line contact regions alternately stacked in the first direction, the plurality of upper memory cells and the plurality of lower memory cells are located in the cell array regions, andonly one of either the plurality of upper memory cells or the plurality of lower memory cells are arranged in at least one of the bit line contact regions.
本发明提供了一种存储装置,该存储装置包括:在第一方向上延伸的多条位线;在位线下方并连接到所述多条位线的多个下存储单元;以及在所述多条位线上方并连接到所述多条位线的多个上存储单元。该存储装置包括在第一方向上交替堆叠的多个单元阵列区域和多个位线接触区域,所述多个上存储单元和所述多个下存储单元位于单元阵列区域中,并且所述多个上存储单元中的至少一个或所述多个下存储单元中的至少一个布置在位线接触区域中的至少一个中。 |
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Bibliography: | Application Number: CN202011041173 |