Compiling method for reducing multi-class memory access conflicts for coarse-grained reconfigurable structure

• Main Authors: JIANG JIANFEI, SHENG WEIGUANG, JING NAIFENG, CHEN YUGE, WANG QIN, MAO ZHIGANG
• Format: Patent
• Language: Chinese; English
• Published: 02.02.2021
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention relates to a compiling method for reducing multi-class memory access conflicts for a coarse-grained reconfigurable structure, which comprises the steps that when the rear end face of a compiler is high, a memory access pressure allocation method is adopted for processing, the starting time of different sub DFGs is adjusted, and a scheduling result is processed through an array initial address offset allocation method; according to the method, different array initial addresses accessed by all memory access operations within a period of time are adjusted, processing of a conflict perception mapping method is further included, different operations are mapped to a PE according to a conflict matrix and the current mapping situation, and the correctness of the mapping process is ensured through a reordering and backtracking algorithm. The method has the beneficial effects that multi-memory-bank conflicts among multiple groups are effectively reduced, and the time cost of a mainmemory for transmitting