HIGH-TEMPERATURE SEMICONDUCTOR BARRIER REGIONS
Semiconductor devices having a high-temperature barrier layer between a III-V material and an underlying substrate are disclosed. The high-temperature barrier layer can minimize or prevent diffusion of arsenic and phosphorous from an overlying layer into the underlying substrate. Dilute nitride-cont...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
22.12.2020
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Subjects | |
Online Access | Get full text |
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Summary: | Semiconductor devices having a high-temperature barrier layer between a III-V material and an underlying substrate are disclosed. The high-temperature barrier layer can minimize or prevent diffusion of arsenic and phosphorous from an overlying layer into the underlying substrate. Dilute nitride-containing multijunction photovoltaic cells incorporating a high-temperature barrier layer exhibit highefficiency.
公开了半导体器件,该半导体器件在III-V材料与下方基板之间具有高温势垒层的。高温势垒层可以最小化或防止砷和磷从覆盖层向下方基板中的扩散。结合了高温势垒层的含稀氮化物的多结光伏电池表现出高效率。 |
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Bibliography: | Application Number: CN201980013764 |