System performance test device and method based on FPGA accelerator card

• Main Authors: CHEN XIANGYUN, YUAN BAODI, QIAN YUXIANG, ZHOU CHUNXIAO
• Format: Patent
• Language: Chinese; English
• Published: 11.12.2020
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

The invention discloses a system performance test device and method based on an FPGA accelerator card, the system performance test device comprises a user, an application server, a monitor, a virtualuser generator, a press machine, the FPGA accelerator card, a controller and an analyzer; the user and the application server carry out information communication, and when a network application program accesses an activity document, and the server returns a program which can be locally executed by the network application program, and when the program runs, the program can be interactively executedwith the user and continuously change the display. According to the invention, through integration of the protocol stack and the driving program, the FPGA achieves a performance test network card andperforms time recording after the MAC data packet is sent, so that the time of the test system can be measured completely, errors of the test equipment and network conditions to the tested system areavoided, and the performanc