VERTICAL JFET DEVICE FOR MEMRISTOR ARRAY INTERFACE

• Main Authors: FOLTIN MARTIN, STRACHAN JOHN P, SHARMA AMIT S
• Format: Patent
• Language: Chinese; English
• Published: 27.11.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Devices and methods are provided. In one aspect, a device for driving a memristor array includes a substrate including a well having a bottom layer, a first wall and a second wall. The substrate is formed of a strained layer of a first semiconductor material. A vertical JFET is formed in the well. The vertical JFET includes a vertical gate region formed in a middle portion of the well with a gateregion height less than a depth of the well. A channel region is formed of an epitaxial layer of a second semiconductor wrapped around the vertical gate region. Vertical source regions are formed on both sides of a first end of the vertical gate region, and vertical drain regions are formed on both sides of a second end of the vertical gate region. 提供了器件和方法。在一个方面，一种用于驱动忆阻器阵列的器件包括衬底，该衬底包括具有底部层、第一壁以及第二壁的阱。衬底由第一半导体材料制成的应变层形成。在阱中形成竖直JFET。竖直JFET包括形成在阱的中间部分中的竖直栅极区，其中，栅极区高度小于阱的深度。沟道区由第二半导体制成的外延层形成，该外延层围绕竖直栅极区。竖直源极区形成在竖直栅极区的第一端的两侧上，并且竖直漏极区形成在竖直栅极区的第二端的两侧上。