CIRCUIT FOR ASYNCHRONOUS DATA TRANSFER

• Main Authors: SANGOLLI RAMESH M, CHANDRA DEEPIKA
• Format: Patent
• Language: Chinese; English
• Published: 17.11.2020
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A circuit for asynchronous data transfer includes a slave device having an asynchronous slave clock for transferring data to a master device having a master clock. The slave clock is a non-continuousclock signal. The slave device includes a clock detection circuit, a register bank, a temporary storage register, and a datapath selector. The slave device receives a data transfer command from the master device. The clock detection circuit detects a presence of the slave clock signal and generates a sync signal. To transfer the data to the master device, the datapath selector selects one of the temporary storage register and the register bank based on the sync signal. The slave device ensures seamless data transfer to the master device regardless of the presence or absence of the slave clocksignal. 一种用于异步数据传送的电路包括具有异步从时钟的从装置，所述从装置用于将数据传送到具有主时钟的主装置。所述从时钟是非连续时钟信号。所述从装置包括时钟检测电路、寄存器组、暂时存储寄存器和数据通路选择器。所述从装置接收来自所述主装置的数据传送命令。所述时钟检测电路检测从时钟信号的存在并且生成同步信号。为了将所述数据传送到所述主装置，所述数据通路选择器基于所述同步信号选择所述暂时存储寄存器和所述寄存器组中的一个。所述从装置确保到所述主装置的