SEMICONDUCTOR MEMORY DEVICE

• Main Authors: MATSUMOTO SOTA, WASHIDA KAZUHIRO, SHIBATA JUNICHI, NISHIMURA TAKAHITO
• Format: Patent
• Language: Chinese; English
• Published: 11.08.2020
• Subjects: ELECTRICITY

A semiconductor memory device according to an embodiment includes a stacked portion, a pillar and first and second contacts. The stacked portion is provided in a first region and a second region, andincludes a plurality of first conductor layers, a plurality of second conductor layers, and a first insulator layer. The first insulator layer is provided between the uppermost first conductor layer and the lowermost second conductor layer. The pillar penetrates the plurality of first conductor layers, the plurality of second conductor layers, and the first insulator layer in the first region. Thefirst contact is connected to the first conductor layers in the second region. The second contact is connected to the second conductor layers in the second region. The thickness of the first insulator layer in the first direction is thicker in the first region than in the second region. 实施方式的半导体存储装置包含积层部、柱、以及第1及第2接点。积层部设置在第1区域与第2区域，且包含多个第1导电体层、多个第2导电体层、及第1绝缘体层。第1绝缘体层设置在最上层的第1导电体层与最下层的第2导电体层之间。柱在第1区域内贯通多个第1导电体层、多个第2导电体层及第1