Low-time-delay high-side driving circuit suitable for GaN device
The invention discloses a low-time-delay high-side driving circuit suitable for a GaN device. The circuit comprises a low-time-delay high-voltage level shifting circuit and an output driving circuit.Low-voltage input data firstly enter the low-delay high-voltage level shifting circuit to obtain low-...
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Main Authors | , , , , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
28.07.2020
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Subjects | |
Online Access | Get full text |
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Summary: | The invention discloses a low-time-delay high-side driving circuit suitable for a GaN device. The circuit comprises a low-time-delay high-voltage level shifting circuit and an output driving circuit.Low-voltage input data firstly enter the low-delay high-voltage level shifting circuit to obtain low-potential floating driving data Din, and the low-potential floating driving data Din enters an output driving circuit and is driven and amplified to obtain an output signal HO with relatively high driving capability; according to the low-delay high-voltage level shifting circuit, two groups of ground potentials of a low-voltage ground VSS and a floating ground SW need to be used, and the output driving circuit only needs to use the floating ground SW. According to the low-delay high-side driving circuit for the GaN device, the delay of the level shifting circuit is reduced through a positive feedback driving current enhancement technology, the driving current can be adaptively adjusted according to the size of a lo |
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Bibliography: | Application Number: CN202010314887 |