HYBRID HIGH-VOLTAGE LOW-VOLTAGE FINFET DEVICE
An integrated circuit includes a plurality of low-voltage FinFET transistors each having a channel length l and a channel width w, the low-voltage FinFET transistors having a first threshold voltage channel implant and a first gate dielectric thickness. The integrated circuit also includes a plurali...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
17.07.2020
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Subjects | |
Online Access | Get full text |
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Summary: | An integrated circuit includes a plurality of low-voltage FinFET transistors each having a channel length l and a channel width w, the low-voltage FinFET transistors having a first threshold voltage channel implant and a first gate dielectric thickness. The integrated circuit also includes a plurality of high-voltage FinFET transistors each having the channel length / and the channel width w, thehigh-voltage FinFET transistors having a second threshold voltage channel implant greater than the first threshold voltage channel implant and second gate dielectric thickness greater than the first gate dielectric thickness.
本公开提供了一种集成电路,该集成电路包括多个低电压FinFET晶体管,该多个低电压FinFET晶体管各自具有沟道长度l和沟道宽度w,该低电压FinFET晶体管具有第一阈值电压沟道注入和第一栅极电介质厚度。该集成电路还包括多个高电压FinFET晶体管,该多个高电压FinFET晶体管各自具有沟道长度l和沟道宽度w,该高电压FinFET晶体管具有大于第一阈值电压沟道注入的第二阈值电压沟道注入和大于第一栅极电介质厚度的第二栅极电介质厚度。 |
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Bibliography: | Application Number: CN201880066973 |