First-in first-out address polling cache read-write method, system and device
The invention discloses a first-in first-out address polling cache read-write method, system and device. The system comprises a mark detection module, a write-in module, a read-out module and a full-space judgment module. The device comprises a write mark detection unit, a read mark detection unit,...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
10.07.2020
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Subjects | |
Online Access | Get full text |
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Summary: | The invention discloses a first-in first-out address polling cache read-write method, system and device. The system comprises a mark detection module, a write-in module, a read-out module and a full-space judgment module. The device comprises a write mark detection unit, a read mark detection unit, a read-write controller, a read-write state machine, a write-in control unit, a read-out control unit, a storage space and a full space judgment unit. According to the invention, a random access memory (RAM) with low cost and large capacity is used for replacing a first-in first-out memory (FIFO) with high price and small capacity; reading and writing of the RAM are separately controlled and independently operated, reading and writing of data are started from the head address of the RAM and arefirst-in first-out, the problem that reading and writing of the RAM cannot be conducted at the same time is solved, and high-capacity first-in first-out data caching is achieved.
本发明公开了一种先进先出地址轮询缓存读写方法、系统及装置。所述系统包括标志检测模块、写入模块 |
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Bibliography: | Application Number: CN202010132867 |