ETCHSTOP REGIONS IN FINS OF SEMICONDUCTOR DEVICES

• Main Authors: LILAK AARON D, RACHMADY WILLY, KAVALIEROS JACK T, DEWEY GILBERT, HUANG CHENG-YING, THOMPSON ERICA J
• Format: Patent
• Language: Chinese; English
• Published: 12.05.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Disclosed are etchstop regions in fins of semiconductor devices, and related methods. A semiconductor device includes a buried region, a fin on the buried region, and a gate formed at least partiallyaround the fin. At least a portion of the fin that borders the buried region includes an etchstop material. The etchstop material includes a doped semiconductor material that has a slower etch rate than that of an intrinsic form of the semiconductor material. A method of manufacturing a semiconductor device includes forming a gate on a fin, implanting part of the fin with dopants configured to decrease an etch rate of the part of the fin, removing at least part of the fin, and forming an epitaxial semiconductor material on a remaining proximal portion of the fin. 所公开的是半导体器件的鳍片中的蚀刻停止区以及有关的方法。一种半导体器件包括所埋入的区、所埋入的区上的鳍片以及至少部分地围绕鳍片所形成的栅极。与所埋入的区邻接的所述鳍片的至少一部分包括蚀刻停止材料。所述蚀刻停止材料包括经掺杂的半导体材料，所述经掺杂的半导体材料具有比本征形式的半导体材料的蚀刻速率更缓慢的蚀刻速率。一种制造半导体器件的方法包括：在鳍片上形成栅极，利用被配置成减小所述鳍片的部分的蚀刻速率的掺杂剂来注入所述鳍片的部分，移除所述鳍片的至少部分，以及在所述鳍片的其余邻近部分上形成外延半导体材料。