Methods and apparatus for controlling warpage in wafer level packaging processes

• Main Authors: KRISTY ANG YU XIN, SUNDARRAJAN ARVIND, RAFI MOHAMED, SULAIMAN MUHAMMAD AZIM BIN SYED, LIANTO PRAYUDI, SEE GUAN HUEI, THIRUNAVUKARASU SRISKANTHARAJAH, ELUMALAI KARTHIK
• Format: Patent
• Language: Chinese; English
• Published: 05.05.2020
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention discloses methods and apparatus for controlling warpage in wafer level packaging processes. Methods and apparatus for producing fine pitch patterning on a substrate are disclosed. Warpage correction of the substrate is accomplished on a carrier or carrier-less substrate. A first warpage correction process is performed on the substrate by raising and holding a temperature of the substrate to a first temperature and cooling the carrier-less substrate to a second temperature. Further wafer level packaging processing is then performed such as forming vias in a polymer layer on the substrate. A second warpage correction process is then performed on the substrate by raising and holding a temperature of the substrate to a third temperature and cooling the substrate to a fourth temperature. With the warpage of the substrate reduced, a redistribution layer may be formed on the substrate with a 2/2 [mu]m l/s fine pitch patterning. 公开了用于在晶片级封装工艺中控制翘曲的方法和设备。用于在衬底上产生精细间距图案化的方法和设备。在载体或无载体的衬底上完成所述衬底的翘曲校正。通过将所述